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INTEGRATED CIRCUITS
74LVT374 3.3V Octal D-type flip-flop; positive-edge trigger (3-State)
Product specification Supersedes data of 1996 Feb 08 IC23 Data Handbook 1998 Feb 19
Philips Semiconductors
Philips Semiconductors
Product specification
3.3V Octal D-type flip-flop; positive-edge trigger (3-State)
74LVT374
FEATURES
* Inputs and outputs on opposite side of package allow easy * 3-State outputs for bus interfacing * Common output enable * TTL input and output switching levels * Input and output interface capability to systems at 5V supply * Bus-hold data inputs eliminate the need for external pull-up * Live insertion/extraction permitted * No bus current loading when output is tied to 5V bus * Power-up 3-State * Power-up reset * Latch-up protection exceeds 500mA per JEDEC Std 17 * ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model resistors to hold unused inputs interface to microprocessors
DESCRIPTION
The 74LVT374 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT374 is an 8-bit, edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the clock (CP) and Output Enable (OE) control gates. The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop's Q output. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the clock operation. When OE is Low, the stored data appears at the outputs. When OE is High, the outputs are in the High-impedance "OFF" state, which means they will neither drive nor load the bus.
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN COUT ICCZ PARAMETER Propagation delay CP to Qn Input capacitance Output capacitance Total supply current CONDITIONS Tamb = 25C; GND = 0V CL = 50pF; VCC = 3.3V VI = 0V or 3.0V Outputs disabled; VI/O = 0V or 3.0V Outputs disabled; VCC = 3.6V TYPICAL 3.2 3.5 4 7 0.13 UNIT ns pF pF mA
ORDERING INFORMATION
PACKAGES 20-Pin Plastic SOL 20-Pin Plastic SSOP Type II 20-Pin Plastic TSSOP Type I TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74LVT374 D 74LVT374 DB 74LVT374 PW NORTH AMERICA 74LVT374 D 74LVT374 DB 74LVT374PW DH DWG NUMBER SOT163-1 SOT339-1 SOT360-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER SYMBOL OE D0-D7 FUNCTION Output enable input (active-Low) Data inputs
OE Q0 D0 D1 Q1 Q2 D2 D3 Q3
1 2 3 4 5 6 7 8 9
20 19 18 17 16 15 14 13 12 11
VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 CP
1 3, 4, 7, 8, 13, 14, 17, 18 2, 5, 6, 9, 12, 15, 16, 19 11 10 20
Q0-Q7 CP GND VCC
Data outputs Clock pulse input (active rising edge) Ground (0V) Positive supply voltage
GND 10
SA00110
1998 Feb 19
2
853-1826 18985
Philips Semiconductors
Product specification
3.3V Octal D-type flip-flop; positive-edge trigger (3-State)
74LVT374
LOGIC SYMBOL
3 4 7 8 13 14 17 18
LOGIC SYMBOL (IEEE/IEC)
1 11 EN C1
D0 D1 D2 D3 D4 D5 D6 D7 11 1 CP OE 3 4 7 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 8 13 2 5 6 9 12 15 16 19 14 17 1D 2 5 6 9 12 15 16 19
SA00111
18
SA00112
FUNCTION TABLE
INPUTS OE L L L H= h= L= l= NC= X= Z= = = CP Dn l h X INTERNAL REGISTER L H NC OUTPUTS Q0 - Q7 L H NC Hold Disable outputs OPERATING MODE
Load and read register
H X X NC Z High voltage level High voltage level one set-up time prior to the Low-to-High clock transition Low voltage level Low voltage level one set-up time prior to the Low-to-High clock transition No change Don't care High impedance "off" state Low-to-High clock transition not a Low-to-High clock transition
LOGIC DIAGRAM
D0 3 D1 4 D2 7 D3 8 D4 13 D5 14 D6 17 D7 18
D
D
D
D
D
D
D
D
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
11 CP
1 OE 2 Q0 5 Q1 6 Q2 9 Q3 12 Q4 15 Q5 16 Q6 19 Q7
SA00113
1998 Feb 19
3
Philips Semiconductors
Product specification
3.3V Octal D-type flip-flop; positive-edge trigger (3-State)
74LVT374
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IO OUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 Output in Off or High state Output in Low state DC output current Output in High state Storage temperature range -64 -65 to 150 C VI < 0 CONDITIONS RATING -0.5 to +4.6 -50 -0.5 to +7.0 -50 -0.5 to +7.0 128 mA UNIT V mA V mA V
DC output diode current DC output voltage3
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL VCC VI VIH VIL IOH IO OL t/v Tamb DC supply voltage Input voltage High-level input voltage Input voltage High-level output current Low-level output current Low-level output current; current duty cycle 50%, f 1kHz Input transition rise or fall rate; outputs enabled Operating free-air temperature range -40 PARAMETER MIN 2.7 0 2.0 0.8 -32 32 mA 64 10 +85 ns/V C MAX 3.6 5.5 V V V V mA UNIT
1998 Feb 19
4
Philips Semiconductors
Product specification
3.3V Octal D-type flip-flop; positive-edge trigger (3-State)
74LVT374
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C MIN VIK Input clamp voltage VCC = 2.7V; IIK = -18mA VCC = 2.7 to 3.6V; IOH = -100A VOH High-level output voltage VCC = 2.7V; IOH = -8mA VCC = 3.0V; IOH = -32mA VCC = 2.7V; IOL = 100A VCC = 2.7V; IOL = 24mA VOL Low-level output voltage VCC = 3.0V; IOL = 16mA VCC = 3.0V; IOL = 32mA VCC = 3.0V; IOL = 64mA VRST Power-up output low voltage5 VCC = 3.6V; IO = 1mA; VI = GND or VCC VCC = 0 or 3.6V; VI = 5.5V II Input l k I t leakage current t VCC = 3.6V; VI = VCC or GND VCC = 3.6V; VI = VCC VCC = 3.6V; VI = 0 IOFF IHOLD Output off current Bus Hold current A inputs7 Current into an output in the High state when VO > VCC Power up/down 3-State output current3 3-State output High current 3-State output Low current VCC = 0V; VI or VO = 0 to 4.5V VCC = 3V; VI = 0.8V VCC = 3V; VI = 2.0V VCC = 0V to 3.6V; VCC = 3.6V IEX IPU/PD IOZH IOZL ICCH ICCL ICCZ ICC Additional supply current per input pin2 Quiescent supply current3 VO = 5.5V; VCC = 3.0V VCC 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don't care VCC= 3.6V; VO = 3V; VI = VIL or VIH VCC= 3.6V; VO = 0.5V; VI = VIL or VIH VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = 06 VCC = 3V to 3.6V; One input at VCC -0.6V, Other inputs at VCC or GND 75 -75 500 60 1 1 1 0.13 3 0.13 0.1 125 100 5 -5 0.19 12 0.19 0.2 mA mA A A A A Control pins Data pins4 VCC-0.2 2.4 2.0 TYP1 -0.9 VCC-0.1 2.5 2.2 0.1 0.3 0.25 0.3 0.4 0.13 1 0.1 0.1 -1 1 150 -150 A 0.2 0.5 0.4 0.5 0.55 0.55 10 1 1 -5 100 A A A V V V MAX -1.2 V UNIT
NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V 0.3V a transition time of 100sec is permitted. This parameter is valid for Tamb = 25C only. 4. Unused pins at VCC or GND. 5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 6. ICCZ is measured with outputs pulled to VCC or down to GND. 7. This is the bus hold overdrive current required to force the input to the opposite logic state.
1998 Feb 19
5
Philips Semiconductors
Product specification
3.3V Octal D-type flip-flop; positive-edge trigger (3-State)
74LVT374
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL fMAX tPLH tPHL tPZH tPZL tPHZ tPLZ PARAMETER Maximum clock frequency Propagation delay CP to Qn Output enable time to High and Low level Output disable time from High and Low level WAVEFORM MIN 1 1 3 4 3 4 125 1.7 2.2 1.5 2.0 1.9 2.0 VCC = 3.3V 0.3V TYP1 200 3.2 3.5 3.2 3.4 4.3 3.4 5.1 5.2 5.3 5.2 6.7 5.1 MAX VCC = 2.7V MIN 125 5.8 5.5 7.3 6.1 7.1 5.1 MAX ns ns ns ns UNIT
NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25C.
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL tS(H) tS(L) TH(H) TH(L) TW(H) PARAMETER WAVEFORM VCC = 3.3V 0.3V MIN Setup time, High or Low, Dn to CP Hold time, High or Low, Dn to CP CP pulse width High or Low 2 2 1 2.0 2.0 0.3 0.3 1.5 2.5 TYP 0.7 0.7 -0.5 -0.5 0.8 1.7 VCC = 2.7V MIN 2.0 2.0 0 0 1.5 3.0 ns ns ns UNIT
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
1/fMAX OE VM tPZH tPLH VM VM VM tPHZ VOH-0.3V 0V
CP
VM
VM
VM
tw(H) tPHL Qn
tw(L) Qn
VM
SA00056
SA00066
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level
Dn
CP
NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
1998 Feb 19
EEEEEEEEEE EEE E EEEEEEEEEE EEE E EEEEEEEEEE EEE E
VM VM VM VM ts(H) th(H) ts(L) th(L) VM VM
OE
VM tPZL
VM tPLZ
Qn
VM
VOL+0.3V 0V
SA00107
SA00067
Waveform 2. Data Setup and Hold Times
Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
6
Philips Semiconductors
Product specification
3.3V Octal D-type flip-flop; positive-edge trigger (3-State)
74LVT374
TEST CIRCUIT AND WAVEFORM
VCC 6.0V Open VIN PULSE GENERATOR RT D.U.T. CL RL tTHL (tF) tTLH (tR) VOUT RL GND tW VM 10% 10% 0V tTLH (tR) tTHL (tF) 90% VM 10% tW 0V AMP (V) VM AMP (V)
90% NEGATIVE PULSE
90%
Test Circuit for 3-State Outputs
90% POSITIVE PULSE 10% VM
SWITCH POSITION
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH SWITCH Open 6V GND
VM = 1.5V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS FAMILY Amplitude 74LVT 2.7V Rep. Rate v10MHz tW tR tF
500ns v2.5ns v2.5ns
SV00092
1998 Feb 19
7
Philips Semiconductors
Product specification
3.3V Octal D-type flip-flop; positive-edge trigger (3-State)
74LVT374
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
1998 Feb 19
8
Philips Semiconductors
Product specification
3.3V Octal D-type flip-flop; positive-edge trigger (3-State)
74LVT374
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
1998 Feb 19
9
Philips Semiconductors
Product specification
3.3V Octal D-type flip-flop; positive-edge trigger (3-State)
74LVT374
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
1998 Feb 19
10
Philips Semiconductors
Product specification
3.3V Octal D-type flip-flop; positive-edge trigger (3-State)
74LVT374
NOTES
1998 Feb 19
11
Philips Semiconductors
Product specification
3.3V Octal D-type flip-flop; positive-edge trigger (3-State)
74LVT374
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-03535
Philips Semiconductors
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